If you are in the market for an inexpensive USB logic analyser you have a several choices, but few of them deliver much in the way of performance. There are kits from China for a few dollars using microcontrollers at their heart, but they fail to deliver significant sample rates. If you require more, you will have to pay for it.
1K logic cells and 16 4Kb Block RAMs. The Logic Cells are a bit misleading. I have found that a lot of CLBs get consumed for route throughs. For example, technically the SUMP2 requires only 700 Flops and 700 LUTs, but the design is 100% full of 1197/1280 LCs. My next port of SUMP2 is the icoBoard. It is the larger 4K Lattice FPGA and they do have a external SRAM version.
I spoke with one of the core developers of Sigrok. The problem is that the internal SW structure of Sigrok does not fit well with FPGA based logic analysers. They said they want to restructure Sigrok so that they can do a logtic analyser with icoBoard. They even purchased an icoBoard. That was Dec 2015. I did not hear back from them since.
Hmm, do you have some details about this? We discussed this a bit on #sigrok and no-one remembered such a conversation, and I found nothing in IRC logs either. Icestick/icoboard based analyzers have been planned but I guess no-one has been interested enough to actually do it.
The most essential tool for engineers is a logic analyzer, which they operate using a laptop or PC to show the results. A stand-alone analyzer with a display can cost you around 10 thousand rupees or more. So, today we will design a low-cost logic analyzer that has its own stand-alone display that is portable and can be carried in the pocket. Hence, do your design and use this tool without worrying about the laptop or PC for viewing the data. The device can be designed by configuring the following components.
Note: The display part is optional and attachable like an accessory. Hence, if you want to remove the display, then the ESP is itself a logic analyzer, and further, to check real-time data on a PC, install the Sigrok. It will cost you only INR 350 if you detach the display.
Now open the Sigrok Pulseview and then go to connect and select the Open Bench logic snipper. Now, select the serial port and baud rate and then scan for the device. After scanning, you will receive the name of the analyzer device. The name used for this device is the ESP board. It shows ARDUINO ESP with 8 channels. Select it, and now your 4-channel logic analyzer is ready.
I will define next week the proposals for student semester work. I think I could make one work package for an open source mixed signal logic analyzer. As for accessing the debug port: yes, it would be possible to access e.g. memory through the SWD connection. I made some experiments in the past, but I have not completed the work (no time).
This blog post won't be about the sigrok software for a change. Instead, it is meant to introduce a little hobby project for a tiny DIY FX2 based Open Hardware logic analyzer (that you can use with sigrok, of course): fx2grok-tiny.
The original plan for a tiny logic analyzer was devised by me (Uwe Hermann) in 2012, but being a sigrok developer, I've concentrated on various more important tasks, features, and bugs in the sigrok stack for quite a while. Near the end of 2017 I finally got around to finishing this project.
So the plan was to make an 8-channel, 24MHz FX2 based logic analyzer that is* Open Hardware (CC-BY-SA 4.0 license for schematics and layout),* uses Open Source EDA tools (KiCad),* uses Open Source software on the PC side (libsigrok, PulseView),* uses Open Source firmware on the FX2 microcontroller (sigrok-firmware-fx2lafw),* and is as tiny as possible
As you probably know, there are tons of (larger) FX2 based LAs around already, so there's no point to make just yet another one of those. What's unique about this one is that it's completely open, and it may just be the smallest logic analyzer on the planet (don't quote me on that, though).
As for the probe cables there are various options as well. You can use a nice Samtec cable or just solder a DIY cable out of generic ribbon cable. In both cases, you'll have to use a crimp tool so you can later attach the usual logic analyzer grippers.
For the future I'm looking into maybe creating an even smaller FX2 based logic analyzer named fx2grok-bga, which employs (you guessed it) the BGA version of the FX2. The BGA chip is 5x5mm (instead of 8x8mm for the QFN version). Soldering this is going to be a bit more tricky though, we'll see how it goes.
I would like to see on this Open Source world is some kind of common format logic analyzer data presentation and maybe common API for accessing the information. In this way it would be easy to write all kinds of applications that decode data and hardware that captures the data independently. It would be easy to integrate different things easily. This would benefit everyone. I would want something like what Wireshark did for network traffic analyzing.
First I though maybe I need to start some of my own code to start this if there is nothing else. For presenting logic data with timestamps one format that come to my mind was Comtrade. Comtrade is a standard for common format for electric power systems transient data exchange. It allows storing many channels of time stamped analogue and digital data. The data is normally in CSV format, so it would be easy to use. There are some standard sample rates but maybe we could use also other rates. Time stamping work at least to microsecond resolution. There are many Comtrade viewing programs, both free and commercial.
[...] (I have not yet tested it with real hardware). The software seem to be considerably getter than some other free logic analyzer software I have checked over years. Logic Sniffer Java client is worth to check out if you are looking for [...]
The Internet is full of low-speed logic analyzer designs that use a CPU. There are also quite a few FPGA-based designs. Both have advantages and disadvantages. FPGAs are fast and can handle lots of data at once. But CPUs often have more memory and it is simpler to perform I/O back to, say, a host computer. [Mohammad] sidestepped the choice. He built a logic analyzer that resides partly on an FPGA and partly on an ARM processor.
A few years ago, [Kumar] created the BeagleLogic, a 14-channel, 100 MSPS logic analyzer for the BeagleBone as an entry for the Hackaday Prize. This is a fantastic tool that takes advantage of the PRUs in the BeagleBone to give anyone with a BeagleBone a very capable logic analyzer for not much cash.
BeagleLogic Standalone is the next step in the evolution of BeagleLogic from just an add-on to the BeagleBone to a standalone logic analyzer in itself. It is based on the OSD3358 System-In-Package (SiP) from Octavo Systems and increases the specifications to 16-channels @100MSa/s and adds Gigabit Ethernet vs. 100Mbps on the BeagleBone(s).
The main challenge when using a microcontroller like STM32 as a core of a logic analyzer is dealing with sampling irregularities. Unlike FPGA-based analyzers, the microcontroller has to share the same resources to load instructions from memory, read/write the program state and capture the external inputs from the GPIO. Given that, it could be tricky for the microcontroller to keep up the sampling frequency perfectly straight and could make the capture very innaccurate. To quantify that, I designed a simple test. The on-board timer was configured to generates series of signals with different characteristics and the DMA was used to record their parameters and compare them with the expected ones:The general idea is that if a test signal is sampled with regular intervals (A), it will always appear as the same repeating sequence of zeroes and ones, while if the sampling becomes sporadic (B), it will quickly introduce observable distortions. Having this methodology mind, we conducted several tests and discovered a few interesting results:
We have also added automatic analyzers for commonly used protocols like UART, SPI, I2S and I2C. Dragging them to the protocol analyzer panel and connecting the inputs automatically replaces the raw view with a higher-level view showing the decoded data:Playing around with the protocol analyzers, we quickly discovered another challenge: displaying the decoded bytes in place of the original signals can only show a small amount of text before it gets zoomed out too much and decoding everything as text makes it hard to see the timings and values of other signals.
The hardware is capable. The software is mighty. So go ahead and send us your feedback and suggestions for new boards to support and we will turn your board into a reliable and easy-to-use logic analyzer next!
Verify and debug digital systems with a logic analyzer. Ideal for digital measurements involving numerous signals or challenging trigger requirements, logic analyzers, logic analyzer software, and oscilloscopes with logic analyzer functionality make it easier for you to probe, acquire, decode, analyze, and validate the performance of your microprocessor, FPGA, or memory design.
Openbench Logic Sniffer is an open source logic analyzer. It's designed to support the SUMP logic analyzer software at the lowest possible cost. Download the source and design files from the Gadget Factory project page. 2b1af7f3a8